In a design of the integrated circuit, it is verified whether a circuit described in a hardware description language or the like is designed in accordance with a specification. In design verification, a path search is conducted based on connection information between modules, starting from a node being an origin. For example, it is provided to verify a correspondence between each input of circuit elements and a power source by an input port search based on the connection information of the circuit, and the like.
In the above-described conventional technology, the path search is conducted based on the connection information of the circuit from a verification target node. The path search can be conducted only for nodes related to the same node being the origin. Most circuits include logic gates such as a selector and the like in a middle of a path. Thus, the path search cannot be further conducted.
Moreover, in a design verification, there are one specification item which can be confirmed by an operation of a designed circuit and other specification item which cannot be confirmed by the operation of the designed circuit. The one specification item which can be confirmed by the operation influences a logical function, and the operation is verified by a functional verification using a simulation of whether the operation meets the one specification item. The other specification item which cannot be confirmed by the operation does not influence the logical function, and the connection verification is conducted to verify whether a connection relationship meets the another specification item. Mainly, the connection verification is conducted visually by a circuit designer. Thus, a large amount of time is consumed. In addition, due to an increase of a circuit scale, it becomes difficult for the circuit designer to visually conduct the connection verification.